Embedded Systems

SMoSi: A framework for the derivation of sleep mode traces from RTL simulations

by Dustin Pe­ter­son and Oliver Bring­mann
In 2016 21st Asia and South Pa­cific De­sign Au­toma­tion Con­fer­ence (ASP-DAC) (): 330-335, 2016.

Key­words: in­te­grated cir­cuit de­sign, in­te­grated cir­cuit mod­el­ling, low-power elec­tron­ics, SMoSi, sleep mode trace gen­er­a­tion, RTL sim­u­la­tions, idle time iden­ti­fi­ca­tion, power op­ti­miza­tion, Ports (Com­put­ers), Re­dun­dancy, Trans­fer func­tions, Boolean func­tions, Data struc­tures, Reg­is­ters, Data­bases

Ab­stract

We pro­pose a method­ol­ogy for the gen­er­a­tion of sleep modes traces. Sleep mode traces iden­tify idle times of com­po­nents in a de­sign and are used in state-of-the-art power op­ti­miza­tion ap­proaches. While de­sign­ers are cur­rently forced to gen­er­ate them man­u­ally, our graph-based method en­ables a full au­toma­tion of this process. We im­ple­mented our method­ol­ogy in a frame­work, that we call SMoSi. Ex­per­i­ments show that SMoSi gen­er­ates sleep mode traces in rea­son­able time for a given de­sign.